The present invention relates to a solid-state imaging device in which photoelectric conversion elements and charge-coupled devices (hereinafter referred to as CCDs) for extracting optical information from the photoelectric conversion elements are realized on a semiconductor substrate in an integrated structure.
In the solid-state imaging device, an imaging plate imparted with as high a resolution power as that of the imaging tube used commonly in existing television broadcasting system is required. To accomplish such high resolution power, there is required a matrix composed of 500 photoelectric conversion elements (pixels) arrayed in the vertical direction and 800 to 1000 photoelectric conversion elements arrayed horizontally as well as a corresponding number of scanning elements. Under the circumstances, the solid-state imaging device is manufactured by resorting to MOS LSI technique which can assure a high integration density, wherein CCDs, MOS transistors or the like are used as the structural elements.
FIG. 1 of the accompanying drawings shows a basic arrangement of a CCD-type solid-state imaging device known heretofore which is characterized by low noise. By way of example, reference may be made to Oda et al's article entitled "A Study of Vertical Over-Flow Structure CCD Imager" in National Convention Record of the Institute of Television Engineers of Japan in 1981, pp 57-58. Referring to FIG. 1, reference symbol 1 denotes photoelectric conversion elements each constituted, for example, by a photodiode, reference numerals 2a, 2b, 2c and 2d denote vertical CCD registers for transferring signals stored in photoelectric elements 1 in the vertical direction v, and 3 denotes a horizontal shift register for extracting the signals from the individual CCD shift registers 2a, 2b, 2c and 2d through output terminal 4-2 of a signal detection circuit 4-1. Clock pulse generators 5-1, 5-2, 6-1 and 6-2 serve to generate clock pulses for driving the vertical shift registers 2a, 2b, 2c and 2d and the horizontal shift register 3. Further, reference numeral 7 denotes transfer gates for transferring electric charges stored in the photodiodes 1 to the vertical shift registers 2a, 2b, 2c and 2d. The solid-state imaging device of the arrangement shown in FIG. 1 can operate solely as a black-and-white imaging device and laminated superposition of color filters on the photoelectric conversion elements is necessary in order that the individual photodiodes serve for storing color information so that the imaging device can function as a color imaging device.
As is well known in the art, the solid-state imaging device has numerous advantages such as small size, light weight, maintenance-freedom, low power consumption and others, when compared with electronic tubes, promising thus high performance as the imaging apparatus. It is however noted that the CCD imaging devices known heretofore suffer problems mentioned below:
(1) The interlaced scanning is performed in the vertical direction in such a manner in which signals are read out from the picture elements or pixels on the odd-numbered rows such as 1st, 3rd, fifth, . . . , (2N-1)-th rows during a first field, while in the second field, signals are read out from the even-numbered rows such as 2nd, fourth, sixth, . . . , 2N-th rows. As the consequence, in the first field of the succeeding frame, signals which were not read out in the just preceding field (i.e. signals on the odd-numbered rows) can be read out in addition to the new signals. This phenomenon is generally referred to as the image lag. PA1 (2) As will be appreciated from the foregoing, signals of the pixels (i.e. picture elements) are read out only on the every-other-row basis in each field. Consequently, the color imaging device is imposed with restriction in respect to the arrangement of color filters as well as the signal processing procedure, resulting in that the resolution power in the vertical direction corresponds only to that equivalent to a half of the pixels arrayed in the vertical direction.
With a view to solving the problems mentioned above, the inventors of the present application has previously proposed a CCD imaging device of a structure illustrated in FIG. 2. Reference also may be made to U.S. Patent Serial No. 768,113 filed Aug. 21, 1985now U.S. Pat. No. 4,774,586, issued Sept. 27, 1988.
The arrangement of the device shown in FIG. 2 differs from the hitherto known one shown in FIG. 1 in respect to the vertical CCD shift register 20 and the horizontal CCD shift register 30. In the case of the arrangement shown in FIG. 2, the vertical CCD shift register 20 includes gate electrodes 21 and 22 wired horizontally and a gate electrode 23 extending vertically so as to cover the shift register 20. In this shift register 20, one bit thereof is constituted by three electrodes 21, 23a and 22 rather than the standard two electrodes found in conventional devices. Consequently, signal charges stored in the photodiodes of each row can be transferred independently on a one-bit basis corresponding to the vertical pitch of the photodiode array. Because of this three-electrode structure information can be read out from the photoelectric conversion elements of all the rows in each field. Thus, difficulty of the every-other-row skipping read-out in the hitherto known imaging device using only two electrodes can be overcome. However, the horizontal CCD shift register has to be so implemented as to be capable of transferring twice as much as information as that required with the hitherto known CCD device.
FIG. 3A shows in a fragmental enlarged plan view of the vertical CCD shift register 20 shown in FIG. 2. In FIG. 3A, reference numerals 21 and 22 denote electrodes serving simultaneously as wiring conductors 21b (not shown) and 22b, where the electrode 21 may be formed of a first layer of polycrystal silicon with the electrode 22 being realized in the form of a second layer of polycrystal silicon. Reference symbol 23a denotes an electrode for a third layer, which electrode is laid in the longitudinal direction so as not to traverse the photodiode region. FIG. 3B is a sectional view taken along the line X-X' in FIG. 3A. In FIG. 3B, reference numeral 10 denotes a thick oxide film for realizing electrical isolation between the photodiode 1d and the vertical CCD and among the photodiodes, reference numeral 9 denotes a thin oxide film for forming an active region (i.e. the CCD region or transfer gate region 70), and 23 denotes a third electrode layer extending vertically. Referring to FIG. 3C which is a sectional view taken along the line y-y' in FIG. 3A, reference numerals 21, 22 and 23 denote first, second and third electrode layers, respectively. Further, reference symbol 20d denotes a buried channel layer (of a second conductivity type same as that of the photodiode, for example). This layer 20d can be omitted, when the CCD shift register is realized in a surface channel type structure. Although a three-phase driving system for the vertical CCD 20 is illustrated, the driving system may be realized in n phases (where n.gtoreq.3), if desired. Further, although the horizontal CCD 30 is illustrated as being driven in three phases, it will be readily appreciated that an m phase driving system (where m.gtoreq.2) may be adopted so far as the photosignals of two rows can be transmitted.
With the three-phase driving type solid-state imaging device, not only the problems mentioned above can be solved satisfactorily but also many other advantages can be obtained in the practical applications. It is however noted that in order to improve further the photosensitivity which is one of the important factors of the imaging device, a planar structure should be adopted with no corrugation in the oxide film while maintaining the three-layer structure. More specifically, when electrical insulation among the photodiodes or between the photodiodes and the CCD is to be realized by using a thick oxide film 10, the material of the oxide film tends to penetrate to the regions of the vertical CCD and the photodiode during the growth of the oxide film to thereby decrease the areas to be occupied by the CCD and the photodiode. When the area for the CCD is previously selected large in precaution for possible reduction in the area mentioned above, the aperture area (area exposed to the light) will then be decreased correspondingly, to degrade the photosensitivity. The reduction in the aperture area will become very significant when an attempt is made to enhance the resolution power in the future, giving rise to an additional problem.
For preventing aperture ratio from being decreased, there may be adopted the planar structure (having no thick oxide-film regions) in which the CCDs, the pixels (picture elements) and the isolation regions are realized by flat thin oxide films. In that case, however, there will arise a demand for a novel isolation structure which does not rely on the use of oxide film.